A NAND semiconductor memory device that is provided with three-dimensionally arranged memory cells includes multiple electrode layers stacked on the source layer, and a semiconductor channel extending through the electrode layers. In such a semiconductor memory device, the electrode layers are formed, for example, by replacing sacrificial layers stacked on the source layer with metal layers. In this process, however, an insulating layer positioned between the source layer and the electrode layers may become thinner, and the breakdown voltage of the insulating layer may be reduced.